Conduction instability of amorphous InGaZnO thin-film transistors under constant drain current stress

Conduction characteristics of amorphous InGaZnO thin-film transistors were investigated by applying constant drain current with gate bias (V GS) modulation. Constant drain current in the off-current (I off) level from the transfer characteristic was applied to the drain electrode and the measured drain voltage with the gate bias sweep. The normalized channel conductance (G d) characteristics were extracted from transfer characteristics and the gate bias modulated drain voltage characteristics with constant drain current stress were compared with the characteristics. The drain voltage induced by the constant drain current stress showed simultaneous transition from off-state with generation current dominant region with increasing drain bias (V DS) to the turn-on state. The high electric field at the drain electrode edge was observed at the threshold voltage (V TH), which can affect the instability characteristics of TFTs. Amorphous InGaZnO (a-IGZO) thin-film transistor (TFT) is one of the prospective alternatives for future displays due to its high mobility (>10 cm 2 /Vs), low-temperature processing capability, and large area uniformity [1]. Recently, the research concerning a-IGZO TFTs is focused on the practical issues of TFTs, such as positive and negative bias-temperature instability (PBTI/NBTI), light illumination, and constant current stress or characteristic improvement [2–4]. However, constant current instability issues were rarely reported [5–7]. Unlike the studies made extensively on the constant current as a stress condition, very little attention was given to the role of a constant current stress dependent instability characteristic, especially the off-current (I off) injection with a variation of the channel states. The purpose of this study is to investigate the conduction characteristics of constant drain current stress. The gate bias dependent channel conductance (G d) characteristic under constant drain current stress is analyzed and compared with the typical transfer characteristic. By applying the constant drain current to the drain electrode in the range of I off level, the gate bias (V GS) induced drain voltage (V DS) is measured. Based on the measurement data, the metal–semiconductor-metal (MSM) structure based analysis is performed on the TFT conduction characteristics [8]. Especially, the large electric field at the drain electrode edge with I DS_inj of I off level is observed. From the result, the instability of a-IGZO TFTs can be examined by using the induced I off to the drain electrode. 2. Fabrication and measurements In this work, a-IGZO TFTs of a conventional inverted staggered bottom gate structure with etch-stop layer (ESL) was fabricated on …